;Code to generate serial output clock for PIC24 according to video timing ;At beginning of line, after sync pulse goes to black level,PIC18F4550 triggered into generating ;output clock pulses. ;25/08/2007 - ########This version 3 also includes FIFO buffer control and logic.########## ;PIC18F4550 accepts timing input from PIC16F690 video sync generator on INT0.(interrupt 0) ;-------------------------------------------------------------------------------------------------------- ; IMPORTANT: For the PIC18 devices, the __CONFIG directive has been ; superseded by the CONFIG directive. The following settings ; are available for this device. ; ; 96MHz PLL Prescaler: ; PLLDIV = 1 No devide (4MHz input) ; PLLDIV = 2 Divide by 2 (8MHz input) ; PLLDIV = 3 Divide by 3 (12MHz input) ; PLLDIV = 4 Divide by 4 (16MHz input) ; PLLDIV = 5 Divide by 5 (20MHz input) ; PLLDIV = 6 Divide by 6 (24MHz input) ; PLLDIV = 10 Divide by 10 (40MHz input) ; PLLDIV = 12 Divide by 12 (48MHz input) ; ; CPU System Clock Postscaler: ; CPUDIV = OSC1_PLL2 [OSC1/OSC2 Src: /1][96MHz PLL Src: /2] ; CPUDIV = OSC2_PLL3 [OSC1/OSC2 Src: /2][96MHz PLL Src: /3] ; CPUDIV = OSC3_PLL4 [OSC1/OSC2 Src: /3][96MHz PLL Src: /4] ; CPUDIV = OSC4_PLL6 [OSC1/OSC2 Src: /4][96MHz PLL Src: /6] ; ; Full-Speed USB Clock Source Selection: ; USBDIV = 1 Clock source from OSC1/OSC2 ; USBDIV = 2 Clock source from 96MHz PLL/2 ; ; Oscillator Selection bits: ; FOSC = XT_XT XT oscillator, XT used by USB ; FOSC = XTPLL_XT XT oscillator, PLL enabled, XT used by USB ; FOSC = ECIO_EC External clock, port function on RA6, EC used by USB ; FOSC = EC_EC External clock, CLKOUT on RA6, EC used by USB ; FOSC = ECPLLIO_EC External clock, PLL enabled, port function on RA6, EC used by USB ; FOSC = ECPLL_EC External clock, PLL enabled, CLKOUT on RA6, EC used by USB ; FOSC = INTOSCIO_EC Internal oscillator, port function on RA6, EC used by USB ; FOSC = INTOSC_EC Internal oscillator, CLKOUT on RA6, EC used by USB ; FOSC = INTOSC_XT Internal oscillator, XT used by USB ; FOSC = INTOSC_HS Internal oscillator, HS used by USB ; FOSC = HS HS oscillator, HS used by USB ; FOSC = HSPLL_HS HS oscillator, PLL enabled, HS used by USB ; ; Fail Safe Clock Monitor: ; FCMEM = OFF Disabled ; FCMEM = ON Enabled ; ; Internal/External Switch Over: ; IESO = OFF Disabled ; IESO = ON Enabled ; ; Power Up Timer: ; PWRT = ON Enabled ; PWRT = OFF Disabled ; ; Brown Out Reset: ; BOR = OFF Disabled ; BOR = SOFT Controled by SBOREN ; BOR = ON_ACTIVE Enabled when the device is not in SLEEP, SBOREN bit is disabled ; BOR = ON Enabled, SBOREN bit is disabled ; ; Brown Out Voltage: ; BORV = 46 4.6V ; BORV = 43 4.3V ; BORV = 28 2.8V ; BORV = 21 2.1V ; ; USB Voltage Regulator Enable: ; VREGEN = OFF Disabled ; VREGEN = ON Enabled ; ; Watchdog Timer: ; WDT = OFF HW Disabled - SW Controlled ; WDT = ON HW Enabled - SW Disabled ; ; Watchdog Postscaler: ; WDTPS = 1 1:1 ; WDTPS = 2 1:2 ; WDTPS = 4 1:4 ; WDTPS = 8 1:8 ; WDTPS = 16 1:16 ; WDTPS = 32 1:32 ; WDTPS = 64 1:64 ; WDTPS = 128 1:128 ; WDTPS = 256 1:256 ; WDTPS = 512 1:512 ; WDTPS = 1024 1:1024 ; WDTPS = 2048 1:2048 ; WDTPS = 4096 1:4096 ; WDTPS = 8192 1:8192 ; WDTPS = 16384 1:16384 ; WDTPS = 32768 1:32768 ; ; MCLR Enable: ; MCLRE = OFF Disabled ; MCLRE = ON Enabled ; ; Low Power Timer1 Oscillator Enable: ; LPT1OSC = OFF Timer1 oscillator configured for high power ; LPT1OSC = ON Timer1 oscillator configured for low power ; ; Port B A/D Enable: ; PBADEN = OFF PortB<4:0> pins are configured as digital I/O on RESET ; PBADEN = ON PortB<4:0> pins are configured as analog input on RESET ; ; CCP2 Mux bit: ; CCP2MX = OFF CCP2 input/output is multiplexed with RB3 ; CCP2MX = ON CCP2 input/output is multiplexed with RC1 ; ; Stack Overflow Reset: ; STVREN = OFF Disabled ; STVREN = ON Enabled ; ; Low Voltage ICSP: ; LVP = OFF Disabled ; LVP = ON Enabled ; ; Dedicated In-Circuit Debug/Programming Enable: ; ICPRT = OFF Disabled ; ICPRT = ON Enabled ; ; Extended Instruction Set Enable: ; XINST = OFF Disabled ; XINST = ON Enabled ; ; Background Debugger Enable: ; DEBUG = ON Enabled ; DEBUG = OFF Disabled ; ; Code Protection Block 0: ; CP0 = ON Enabled ; CP0 = OFF Disabled ; ; Code Protection Block 1: ; CP1 = ON Enabled ; CP1 = OFF Disabled ; ; Code Protection Block 2: ; CP2 = ON Enabled ; CP2 = OFF Disabled ; ; Code Protection Block 3: ; CP3 = ON Enabled ; CP3 = OFF Disabled ; ; Boot Block Code Protection: ; CPB = ON Enabled ; CPB = OFF Disabled ; ; Data EEPROM Code Protection: ; CPD = ON Enabled ; CPD = OFF Disabled ; ; Write Protection Block 0: ; WRT0 = ON Enabled ; WRT0 = OFF Disabled ; ; Write Protection Block 1: ; WRT1 = ON Enabled ; WRT1 = OFF Disabled ; ; Write Protection Block 2: ; WRT2 = ON Enabled ; WRT2 = OFF Disabled ; ; Write Protection Block 3: ; WRT3 = ON Enabled ; WRT3 = OFF Disabled ; ; Boot Block Write Protection: ; WRTB = ON Enabled ; WRTB = OFF Disabled ; ; Configuration Register Write Protection: ; WRTC = ON Enabled ; WRTC = OFF Disabled ; ; Data EEPROM Write Protection: ; WRTD = ON Enabled ; WRTD = OFF Disabled ; ; Table Read Protection Block 0: ; EBTR0 = ON Enabled ; EBTR0 = OFF Disabled ; ; Table Read Protection Block 1: ; EBTR1 = ON Enabled ; EBTR1 = OFF Disabled ; ; Table Read Protection Block 2: ; EBTR2 = ON Enabled ; EBTR2 = OFF Disabled ; ; Table Read Protection Block 3: ; EBTR3 = ON Enabled ; EBTR3 = OFF Disabled ; ; Boot Block Table Read Protection: ; EBTRB = ON Enabled ; EBTRB = OFF Disabled ;------------------------------------------------------------------------------------------------------- #include errorlevel -302, -307 ;this line to remove banking warning ;Set configuration CORE @ 48MHz------------------------------------------------------------------------- CONFIG PLLDIV = 2 ;Divide by 2 (8MHz input) CONFIG CPUDIV = OSC1_PLL2 ;[OSC1/OSC2 Src: /1][96MHz PLL Src: /2] CONFIG USBDIV = 2 ;Clock source from 96MHz PLL/2 CONFIG FOSC = HSPLL_HS ;HS oscillator, PLL enabled, HS used by USB CONFIG FCMEM = OFF ;Disabled CONFIG IESO = OFF ;Disabled CONFIG PWRT = ON ;Enabled CONFIG BOR = OFF ;Disabled CONFIG BORV = 46 ;4.6V - Disabled - see previous CONFIG VREGEN = OFF ;Disabled CONFIG WDT = OFF ;HW Disabled - SW Controlled CONFIG WDTPS = 1 ;1:1 CONFIG MCLRE = ON ;Enabled CONFIG LPT1OSC = OFF ;Timer1 oscillator configured for high power CONFIG PBADEN = OFF ;PortB<4:0> pins are configured as digital I/O on RESET CONFIG CCP2MX = OFF ;CCP2 input/output is multiplexed with RB3 CONFIG STVREN = OFF ;Disabled CONFIG LVP = OFF ;Disabled CONFIG ICPRT = OFF ;Disabled CONFIG XINST = OFF ;Disabled CONFIG DEBUG = OFF ;Disabled CONFIG CP0 = OFF ;Disabled CONFIG CP1 = OFF ;Disabled CONFIG CP2 = OFF ;Disabled CONFIG CP3 = OFF ;Disabled CONFIG CPB = OFF ;Disabled CONFIG CPD = OFF ;Disabled CONFIG WRT0 = OFF ;Disabled CONFIG WRT1 = OFF ;Disabled CONFIG WRT2 = OFF ;Disabled CONFIG WRT3 = OFF ;Disabled CONFIG WRTB = OFF ;Disabled CONFIG WRTC = OFF ;Disabled CONFIG WRTD = OFF ;Disabled CONFIG EBTR0 = OFF ;Disabled CONFIG EBTR1 = OFF ;Disabled CONFIG EBTR2 = OFF ;Disabled CONFIG EBTR3 = OFF ;Disabled CONFIG EBTRB = OFF ;Disabled ;End of configuration------------------------------------------------------------------------------------ cblock 0x20 W_TEMP STATUS_TEMP BSR_TEMP delay_counter CNT1 CNT2 CNT3 endc ;----------------------------------------------------------------------------------------------------------------------------------- ;------------------------------------------------------------------------------------------------------------------------------------ ORG 0x000 ;RESET vector goto start ;ISR ORG 0008h MOVWF W_TEMP ; W_TEMP is in virtual bank MOVFF STATUS, STATUS_TEMP ; STATUS_TEMP located anywhere MOVFF BSR, BSR_TEMP ; BSR_TMEP located anywhere BCF INTCON,INT0IF ;Clear the external INTO flag bit btfss PORTB,2 ;Check to see if HF line is high goto exit_interrupt ;if low then EXIT interrupt BSF PORTD,1 ;delay to make sure back porch is clear movlw d'18' movwf delay_counter delay decfsz delay_counter goto delay ;Produce 96 clock cycles, 6x16bit PCM samples per line----- 52 microsecond active line contains 96 bits (96 clock cycles or 96 low-high transitions) ; Each clock pulse is 250ns long, 3 INSTRUCTIONS = 250ns, One clock cycle = 500ns --> 2MHz ; 96clock cycles @ 500ns/cycle=48us PCM data ;Valid sample flag pulses---------------------------------------------------------------------------------------------------------------------------------------- BSF PORTD,0 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns NOP ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTD,0 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns NOP ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTD,0 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns NOP ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTD,0 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns NOP ; - LOW - 83.3ns NOP ; 83.3ns MOVLW B'01101000' ; 83.3ns = 250ns MOVWF PORTB ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns MOVLW B'01001000' ;GET READY TO LOAD SAMPLE 83.3ns = 250ns PORTB,5 (PARALLEL ENABLE LS166) START HIGH AND END HIGH MOVWF PORTB ;LOAD SAMPLE INTO LS166 - LOW - 83.3ns PORTB,5 GOES LOW (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns ;----------------------------------------- ;LOAD THE LS166 WITH ONE SAMPLE ;PROCEED TO CLOCK OUT SAMPLE ;[1] ---------------------------CLOCK PULSES FOR ONE PCM SAMPLE---------------------- - FIRST SAMPLE - -------------------------------------------------- BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT1 PORTB,5 STAYS LOW (PARALLEL ENABLE LS166)PORTB,4 GOES HIGH (CLOCK HIGH) NOP ; 83.3ns MOVLW B'00101000' ; 83.3ns = 250ns MOVWF PORTB ; - LOW - 83.3ns PORTB,5 GOES HIGH (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT2 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT3 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT4 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT5 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT6 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT7 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT8 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT9 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT10 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT11 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT12 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT13 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT14 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT15 NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns MOVLW B'01111000' ; 83.3ns = 250ns MOVWF PORTB ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3n MOVLW B'01001000' ;GET READY TO LOAD SAMPLE 83.3ns = 250ns PORTB,5 (PARALLEL ENABLE LS166) START HIGH AND END HIGH MOVWF PORTB ;LOAD SAMPLE INTO LS166 - LOW - 83.3ns PORTB,5 GOES LOW (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns ;----------------------------------------- ;LOAD THE LS166 WITH ONE SAMPLE ;PROCEED TO CLOCK OUT SAMPLE ;[2] ---------------------------CLOCK PULSES FOR ONE PCM SAMPLE BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT1 PORTB,5 STAYS LOW (PARALLEL ENABLE LS166)PORTB,4 GOES HIGH (CLOCK HIGH) NOP ; 83.3ns MOVLW B'00101000' ; 83.3ns = 250ns MOVWF PORTB ; - LOW - 83.3ns PORTB,5 GOES HIGH (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns MOVLW B'01111000' ; 83.3ns = 250ns MOVWF PORTB ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3n MOVLW B'01001000' ;GET READY TO LOAD SAMPLE 83.3ns = 250ns PORTB,5 (PARALLEL ENABLE LS166) START HIGH AND END HIGH MOVWF PORTB ;LOAD SAMPLE INTO LS166 - LOW - 83.3ns PORTB,5 GOES LOW (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns ;----------------------------------------- ;LOAD THE LS166 WITH ONE SAMPLE ;PROCEED TO CLOCK OUT SAMPLE ;[3] ---------------------------CLOCK PULSES FOR ONE PCM SAMPLE BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT1 PORTB,5 STAYS LOW (PARALLEL ENABLE LS166)PORTB,4 GOES HIGH (CLOCK HIGH) NOP ; 83.3ns MOVLW B'00101000' ; 83.3ns = 250ns MOVWF PORTB ; - LOW - 83.3ns PORTB,5 GOES HIGH (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns MOVLW B'01111000' ; 83.3ns = 250ns MOVWF PORTB ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3n MOVLW B'01001000' ;GET READY TO LOAD SAMPLE 83.3ns = 250ns PORTB,5 (PARALLEL ENABLE LS166) START HIGH AND END HIGH MOVWF PORTB ;LOAD SAMPLE INTO LS166 - LOW - 83.3ns PORTB,5 GOES LOW (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns ;----------------------------------------- ;LOAD THE LS166 WITH ONE SAMPLE ;PROCEED TO CLOCK OUT SAMPLE ;[4] ---------------------------CLOCK PULSES FOR ONE PCM SAMPLE BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT1 PORTB,5 STAYS LOW (PARALLEL ENABLE LS166)PORTB,4 GOES HIGH (CLOCK HIGH) NOP ; 83.3ns MOVLW B'00101000' ; 83.3ns = 250ns MOVWF PORTB ; - LOW - 83.3ns PORTB,5 GOES HIGH (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns MOVLW B'01111000' ; 83.3ns = 250ns MOVWF PORTB ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3n MOVLW B'01001000' ;GET READY TO LOAD SAMPLE 83.3ns = 250ns PORTB,5 (PARALLEL ENABLE LS166) START HIGH AND END HIGH MOVWF PORTB ;LOAD SAMPLE INTO LS166 - LOW - 83.3ns PORTB,5 GOES LOW (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns ;----------------------------------------- ;LOAD THE LS166 WITH ONE SAMPLE ;PROCEED TO CLOCK OUT SAMPLE ;[5] ---------------------------CLOCK PULSES FOR ONE PCM SAMPLE BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT1 PORTB,5 STAYS LOW (PARALLEL ENABLE LS166)PORTB,4 GOES HIGH (CLOCK HIGH) NOP ; 83.3ns MOVLW B'00101000' ; 83.3ns = 250ns MOVWF PORTB ; - LOW - 83.3ns PORTB,5 GOES HIGH (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns MOVLW B'01111000' ; 83.3ns = 250ns MOVWF PORTB ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3n MOVLW B'01001000' ;GET READY TO LOAD SAMPLE 83.3ns = 250ns PORTB,5 (PARALLEL ENABLE LS166) START HIGH AND END HIGH MOVWF PORTB ;LOAD SAMPLE INTO LS166 - LOW - 83.3ns PORTB,5 GOES LOW (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns ;----------------------------------------- ;LOAD THE LS166 WITH ONE SAMPLE ;PROCEED TO CLOCK OUT SAMPLE ;[6] ---------------------------CLOCK PULSES FOR ONE PCM SAMPLE BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns BIT1 PORTB,5 STAYS LOW (PARALLEL ENABLE LS166)PORTB,4 GOES HIGH (CLOCK HIGH) NOP ; 83.3ns MOVLW B'00101000' ; 83.3ns = 250ns MOVWF PORTB ; - LOW - 83.3ns PORTB,5 GOES HIGH (PARALLEL ENABLE LS166)PORTB,4 GOES LOW (CLOCK LOW) NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BSF PORTB,4 ;One cycle of clock - HIGH - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns BCF PORTB,4 ; - LOW - 83.3ns NOP ; 83.3ns NOP ; 83.3ns = 250ns = 8 microseconds ;End of video line---------------------------------------------------------------------------------------- BCF PORTD,1 ; 83.3ns ;LS166 reset pin LOW MOVLW B'00101000' MOVWF PORTB exit_interrupt MOVFF BSR_TEMP, BSR ; Restore BSR MOVF W_TEMP, W ; Restore WREG MOVFF STATUS_TEMP, STATUS ; Restore STATUS RETFIE ;------------------------------------------------------------------------------------------------------------------------------------ ;------------------------------------------------------------------------------------------------------------------------------------ start ;Set inputs and outputs clrf TRISA ; make IO Port A output clrf PORTB ; Initialize PORTB by clearing output data latches movlw 0Eh ; Set RB<4:0> as movwf ADCON1 ; digital I/O pins (required if config bit PBADEN is set) movlw b'10000101' ; Value used to initialize data direction - 00000101 movwf TRISB ; Set RB<0> as input ; RB<1> as output ; RB<2> as input ; RB<3> as output ; RB<4:5> as outputs ; RB<6> as outputs ; RB<7> as input bsf PORTB,5 ; PE LS166 HIGH clrf TRISC ; make IO Port C output clrf TRISD ; make IO Port D output clrf PORTA ; clear Port A ;DISABLE ALL INPUT SIGNALS BCK,LRCK,DATA--------------- bsf PORTB,1 ;------------------------------------------------------ clrf PORTC ; clear Port C clrf PORTD ; clear Port D ;------------------------------------------------------------------------------------------------------------------------------------ ;Interrupt setup BCF INTCON2,RBPU ;PORTB Pull-up - DISABLED BSF INTCON2,INTEDG0 ;External Interrupt 0 Edge select bit - Interrupt on rising edge ** BSF INTCON2,INTEDG1 ;External Interrupt 1 Edge select bit - Interrupt on rising edge BSF INTCON2,INTEDG2 ;External Interrupt 2 Edge select bit - Interrupt on rising edge BCF INTCON3,INT2IE ;INT2 External Interrupt Enable bit - DISABLED BCF INTCON3,INT1IE ;INT1 External Interrupt Enable bit - DISABLED MOVLW 0h MOVWF PIE1 ;Perihperal Interrupts - DISABLED MOVLW 0h MOVWF PIE2 ;Peripheral Interrupts - DISABLED BCF RCON,IPEN ;Interrupt Priority Enable bit,DISABLED priority levels (PIC16CXXX Compatibility mode) BCF INTCON,PEIE ;Peripheral Interrupt Enable bit - DISABLED BCF INTCON,TMR0IE ;TMR0 Overflow Interrupt Enable bit - DISABLED BCF INTCON,RBIE ;RB Port Change Interrupt Enable bit - DISABLED BCF INTCON,TMR0IF ;TMR0 Overflow interrupt flag bit - CLEAR BCF INTCON,INT0IF ;INTO External Interrupt flag bit - CLEAR ** BSF INTCON,INT0IE ;INTO External Interrupt Enable bit - ENABLED ** BCF INTCON,RBIF ;RB Port Change Interrupt flag bit - CLEAR ;------------------------------------------------------------------------------------------------------------------------------------ ;BOOTUP_SEQUENCE ;------------------------------------------------------------------------------------------------------------------------------------ ;REMEMBER - Define input pins for EMPTY, HF on FIFO ; PORTB,3 - FIFO RESET - active LOW ; PORTB,2 - HF - active HIGH ; Define output pins for MASTER RESET (LS166 and HCT595) and RESET (FIFO) ; PORTB,1 - OE HC366 (active low) ;The BOOTUP sequence waits for HF to go high. Then is activates the clocks, interrupts etc. HF line not checked again. ;RESET THE FIFO--------------- bsf PORTB,3 CALL DELAY1 bcf PORTB,3 CALL DELAY1 bsf PORTB,3 ;----------------------------- ;ENABLE ALL INPUT SIGNALS BCK,LRCK,DATA---------------- bcf PORTB,1 ;FIFO starts to fill -- ######## First sample loaded appears on output ######### ;very first sample will not be recorded.ISR will clock out the second sample and start first line with that-NO BIGGIE HF_TEST ;Check to see if HF line of FIFO is high btfss PORTB,2 ;if low goto HF_TEST goto HF_TEST ;else continue ;PCM sample recording can now start ENABLE THE INTERRUPTS! call interrupt_enable ;Global Interupt Enable - ENABLED ;------------------------------------------------------------------------------------------------------------------------------------ ;Start of main program ;------------------------------------------------------------------------------------------------------------------------------------ main NOP NOP NOP goto main ;------------------------------------------------------------------------------------------------------------------------------------ ;Special Functions ;------------------------------------------------------------------------------------------------------------------------------------ interrupt_disable BCF INTCON,GIE BCF INTCON,GIEH return interrupt_enable BCF INTCON,INT0IF ;Clear the external INTO flag bit BSF INTCON,GIE BSF INTCON,GIEH return DELAY1 movlw d'64' movwf CNT3 LOOP1 MOVLW D'128' MOVWF CNT2 LOOP2 MOVLW D'255' MOVWF CNT1 LOOP3 NOP DECFSZ CNT1,F GOTO LOOP3 DECFSZ CNT2,F GOTO LOOP2 DECFSZ CNT3,F GOTO LOOP1 RETURN ;------------------------------------------------------------------------------------------------------------------------------------ end